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 PIP250M
Integrated buck converter
Rev. 02 -- 21 February 2003
M3D797
Product data
1. Description
The PIP250M is a fully integrated synchronous buck converter intended for use as a point-of-load regulator. It contains two N-channel power MOSFETs, a Schottky diode and a voltage mode, pulse width modulated (PWM) controller. The controller features include overcurrent and overvoltage protection and undervoltage lockout functions. By combining the power components and the controller into a single component, stray inductances are virtually eliminated, resulting in lower switching losses and a compact, efficient design with minimal external component count.
2. Features
s s s s s s s s s Output current up to 15 A Single supply 5 V operation Fixed 300 kHz operating frequency Voltage mode control Minimum regulated output voltage 0.8 V Internal soft start Overcurrent protection Overvoltage protection Remote sensing.
3. Applications
s s s s s s s High-current point-of-load regulation Distributed power architectures Multiple output telecom power supplies Microprocessor and Digital Signal Processing (DSP) supplies Computer peripheral supplies Cable modems Set-top boxes.
4. Ordering information
Table 1: Ordering information Package Name PIP250M HVQFN68 Description Version plastic, thermal enhanced very thin quad flat package; no leads; SOT687-1 68 terminals; body 10 x 10 x 0.85 mm Type number
Philips Semiconductors
PIP250M
Integrated buck converter
5. Block diagram
VDDC
61, 62
6.0 V REGULATOR
7 40 A 1, 2 5
CB
PIP250M
POWER ON RESET
OCSET/ ENABLE PHASE
strobe 0.8 V REFERENCE SOFT START 1V OVP 9, 12 to 17, 25, 26, PAD2 VDDO
UVP 0.5 V 0.8 V FB 65 8, 60, 67 68, PAD1 ERROR AMP 300 kHz OSCILLATOR 35 dB PWM CONTROL LOGIC VDDC
10, 18 to 24, 27 to 41 59, PAD3
VO
VSSC
42 to 58
VSSO
03aj54
Fig 1. Block diagram
9397 750 10904
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 02 -- 21 February 2003
2 of 19
Philips Semiconductors
PIP250M
Integrated buck converter
6. Pinning information
6.1 Pinning
VDDC VDDC VSSC VSSC VSSC n.c. VO VSSO VSSO VSSO VSSO VSSO VSSO VSSO
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35
OCSET/ENABLE OCSET/ENABLE n.c. n.c. PHASE n.c. CB VSSC VDDO VO n.c. VDDO VDDO VDDO VDDO VDDO VDDO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52
FB n.c. n.c.
VSSC PAD 1
VO PAD 3
VSSO VSSO VSSO VSSO VSSO VSSO VSSO VSSO VSSO VSSO VO VO VO VO VO VO VO
VDDO PAD 2
PIP250M
VO VO VO VO VO VO VO VDDO VDDO VO VO VO VO VO VO VO VO 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
03aj53
Grey area denotes terminal 1 index area.
Fig 2. Pin configuration (footprint view).
6.2 Pin description
Table 2: Symbol VDDO VSSO VDDC VSSC VO Pin description Pin 9, 12 to 17, 25, 26, PAD2 42 to 58 61, 62 8, 60, 67, 68, PAD1 10, 18 to 24, 27 to 41, 59, PAD3 7 5 1, 2 65 3, 4, 6, 11, 63, 64, 66
[2] [1] [1]
I/O O
Description output stage supply voltage output stage ground control circuit supply voltage control circuit ground output
[1]
CB PHASE OCSET/ ENABLE FB n.c.
I/O I I I -
bootstrap capacitor connection sense connection for current limit current limit set and enable input feedback input no internal connection
9397 750 10904
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Product data
Rev. 02 -- 21 February 2003
3 of 19
Philips Semiconductors
PIP250M
Integrated buck converter
PAD1, PAD2 and PAD3 are electrical connections and must be soldered to the printed circuit board All n.c. pins should be connected to VSSC.
[1] [2]
7. Functional description
7.1 Pin functions
7.1.1 Output stage supply (VDDO, VSSO) The power output stage of the PIP250M consists of two N-channel, power MOSFETs and a Schottky diode configured as a synchronous buck converter. The drain of the upper MOSFET is connected to the positive conversion supply (VDDO), and the source of the lower MOSFET is connected to power ground (VSSO). The Schottky diode is connected between the source and drain of the lower MOSFET. 7.1.2 Output voltage (VO) VO is the switched node of the power MOSFET output stage. This node is connected internally to the source of the upper MOSFET and the drain of the lower MOSFET. 7.1.3 Control circuit supply (VDDC, VSSC) VDDC is the positive supply to the control circuit. VSSC is the control circuit ground. All control voltages are measured with respect to VSSC. 7.1.4 Bootstrap capacitor connection (CB) The upper MOSFET driver stage is powered from the CB pin. 7.1.5 Voltage feedback pin (FB) The FB pin is connected to the inverting input of the error amplifier, and to the inputs of the overvoltage and undervoltage comparators. 7.1.6 Current limit set and enable input (OCSET/ENABLE) The overcurrent threshold is set by an external resistor between VDDO and OCSET/ENABLE. The PIP250M can be shut down by pulling this pin LOW. 7.1.7 Sense connection for current limit (PHASE) The PHASE input is normally connected externally to the power output stage switched node (VO). The voltage on the PHASE input is compared with the voltage on the OCSET/ENABLE input during the interval when the upper MOSFET is on. The overcurrent trip operates if the voltage on the PHASE input is lower than the voltage on the OCSET/ENABLE input.
9397 750 10904
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Product data
Rev. 02 -- 21 February 2003
4 of 19
Philips Semiconductors
PIP250M
Integrated buck converter
7.2 Operation
7.2.1 Single supply operation
10
5V
D1 VDDC CB VDDO 100 nF VO 1 F 100 F VSSO
03ak42
PIP250M
VSSC
Fig 3. Single supply operation.
Operation of the PIP250M from a single 5 V conversion supply is shown in Figure 3. The upper MOSFET gate driver stage is supplied from the CB pin. An external bootstrap circuit, comprising D1 and the 100 nF capacitor generates a voltage on CB of twice VDDO. The control circuit supply, VDDC is protected from transients by a low pass filter comprising a 10 resistor and a 1 F capacitor. These components should be placed close to the device pins. 7.2.2 Regulated output voltage The reference voltage of the PIP250M is 0.8 V. The regulated output voltage is set using a resistive divider as shown in Figure 9. The resistors should be placed as close as possible to the FB pin. Both resistors should be less than 1 k in order to avoid noise coupling. The 68 nF capacitor across the upper resistor improves the control loop stability by adding a small amount of phase margin. 7.2.3 Power on reset The PIP250M control circuit powers up when the voltage on VDDC rises above the start-up threshold voltage (typically 4.1 V). The control circuit stops operating when the voltage on VDDC falls below the power-down threshold voltage (typically 3.6 V). Once the voltage on VDDC is above the start-up threshold voltage, the PIP250M does not produce pulses until the voltage on OCSET/ENABLE rises above the OCSET/ ENABLE start-up threshold voltage (typically 1.25 V). 7.2.4 Soft start The soft start sequence prevents surge currents being drawn from the conversion supply when the PIP250M is powered up into a high current load. The soft start sequence is controlled by an internal digital counter. During the soft start sequence, the reference voltage on the non inverting input of the error amplifier is increased from zero up to the normal operating level of 0.8 V. The duration of the soft start sequence is typically 2 ms.
9397 750 10904 (c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 02 -- 21 February 2003
5 of 19
Philips Semiconductors
PIP250M
Integrated buck converter
7.2.5
Overcurrent protection
5V ROCSET 1 nF OCSET/ ENABLE VDDO
PIP250M
40 A OC PHASE strobe CONTROL LOGIC VO
03ak44
Fig 4. Overcurrent protection.
The overcurrent protection function is shown in Figure 4. The overcurrent trip function is enabled when the upper MOSFET gate drive signal is HIGH. During this interval, the voltage on the PHASE input is compared with the voltage on the OCSET/ENABLE input. If the voltage on the PHASE input is lower than the voltage on the OCSET/ENABLE input, then the PIP250M detects an overcurrent trip condition and turns off the gate drive to the upper MOSFET. There is an internal filter with a time constant of 30 s in series with the PHASE input. Since the switching frequency is 300 kHz, this means that the overcurrent trip operates if the overcurrent condition persists for10 switching cycles. If three overcurrent pulses are detected, the PIP250M latches off and produces no more pulses until it has been reset. To reset the PIP250M, the supply voltage (VDDC) must be reduced below the power down reset threshold and then increased back up to 5 V. An external resistor (ROCSET) sets the overcurrent trip level. Figure 5 shows the overcurrent trip level (ITRIP) as a function of ROCSET.
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(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 02 -- 21 February 2003
6 of 19
Philips Semiconductors
PIP250M
Integrated buck converter
30 ITRIP (A) 20
03ak48
10
0 1
2
3 ROCSET (k)
4
Fig 5. Overcurrent trip level as a function of ROCSET.
7.2.6
Undervoltage and overvoltage protection With reference to Figure 1, the FB pin is connected internally to the overvoltage and undervoltage comparators, labelled OVP and UVP respectively. In normal operation, the voltage on FB is regulated at 0.8 V. If the voltage on FB exceeds the overvoltage protection (OVP) threshold (1 V) for longer than 30 s, an overvoltage condition is detected, the gate drive signals to the MOSFETs are disabled, and the PIP250M latches off. To reset the latch, the PIP250M must be powered down by reducing VDDC below the power down reset threshold and then increasing VDDC back up to 5 V. If the voltage on FB drops below the undervoltage protection (UVP) threshold (0.5 V) for longer than 30 s, then an undervoltage condition is detected and the gate drive signals to the MOSFET drivers are turned off. If three undervoltage pulses are detected then the PIP250M latches off. To reset the PIP250M, the supply voltage (VDDC) must be reduced below the power down reset threshold and then increased back up to 5 V.
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Product data
Rev. 02 -- 21 February 2003
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Philips Semiconductors
PIP250M
Integrated buck converter
8. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDDC VDDO VPHASE VOCSET VFB VO VCB IO(AV) IORM Ptot Tj Tstg Vesd Parameter control circuit supply voltage output stage supply voltage input voltage on PHASE input voltage on OCSET input voltage on FB output voltage bootstrap voltage average output current repetitive peak output current total power dissipation junction temperature storage temperature electrostatic discharge voltage human body model; C = 100 pF; R = 1500 machine model; C = 200 pF; R = 10 ; L = 0.75 H
[1] [2] [3] Pulse width and repetition rate limited by maximum value of Tj. Assumes a thermal resistance from junction to printed-circuit board of 5 K/W The PIP250M meets class 2 for Human Body Model and class M3 for Machine Model.
[3]
Conditions
Min -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3
Max +7 +7 +7 +7 +7 +VDDO + 0.3 +15 15 200 20 7 +125 +150 2 200
Unit V V V V V V V A A W W C C kV V
Tpcb 110 C; Figure 6 tp 10 s; duty cycle 0.075 Tpcb = 25 C Tpcb = 90 C
[1] [2] [2]
-40 -55 -
16 IO(AV) (A) 12
03ak50
8
4
0
0
50
100
Tpcb (C)
150
Circuit of Figure 9; VDDC = 5 V; VDDO = 5 V; VO = 2.5 V.
Fig 6. Average output current as a function of printed-circuit board temperature.
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Product data
Rev. 02 -- 21 February 2003
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Philips Semiconductors
PIP250M
Integrated buck converter
9. Thermal characteristics
Table 4: Symbol Rth(j-pcb) Thermal characteristics Parameter thermal resistance from junction to printed-circuit board thermal resistance from junction to ambient device mounted on FR4 printed-circuit board; copper area around device 25 x 25 mm no thermal vias with thermal vias with thermal vias and forced air cooling; airflow = 0.8 ms-1 (150 LFM) Rth(j-c) thermal resistance from junction to case measured on upper surface of package. 25 20 15 K/W K/W K/W Conditions Min Typ 4 Max 5 Unit K/W
Rth(j-a)
-
11
-
K/W
10. Characteristics
Table 5: Characteristics VDDC = 5 V; Tamb = 25 C; circuit of Figure 9 unless otherwise specified. Symbol VDDC IDDC Ptot Parameter Conditions Min VDDC = 5 V; VDDO = 5 V; VO = 2.5 V; IO(AV) = 15 A; Figure 7 VDDC = 5 V; VDDO = 5 V; VO = 2.5 V; IO(AV) = 15 A; Figure 8 VDDC increasing; VOCSET = 4.5 V VDDC decreasing; VOCSET = 4.5 V VOCSET = 4.5 V VOCSET increasing Typ 5 24 3.6 Max Unit V mA W Control circuit supply control circuit supply voltage -40 C Tj +125 C control circuit supply current power dissipation
Power dissipation
efficiency
-
88
-
%
Power-on Reset VDDC(th)su VDDC(th)sd Vhys start-up threshold control circuit supply voltage shut-down threshold control circuit supply voltage hysteresis 3.85 3.25 0.3 0.8 4.1 3.7 0.5 1.25 4.35 3.98 0.7 2.0 V V V V
VOCSET(th)su start-up threshold voltage OCSET Reference Vi(ref)FB Oscillator fosc Vosc(p-p)
9397 750 10904
reference voltage oscillator frequency oscillator ramp amplitude (peak-to-peak value)
measured at FB pin
0.78 250 -
0.8 300 1.75
0.82 350 -
V kHz V
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Product data
Rev. 02 -- 21 February 2003
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Philips Semiconductors
PIP250M
Integrated buck converter
Table 5: Characteristics...continued VDDC = 5 V; Tamb = 25 C; circuit of Figure 9 unless otherwise specified. Symbol Gol GB VFB(th)OV VFB(th)UV IOCSET tD(OC) tD(UV) tSS Parameter open loop gain Gain bandwidth product overvoltage threshold feedback voltage undervoltage threshold feedback voltage OCSET sink current overcurrent trip delay undervoltage trip delay soft start interval voltage on FB increasing voltage on FB decreasing VOCSET = 4.5 V Conditions Min 1.0 35 Typ 35 17 1.1 0.5 40 30 30 2 Max 0.6 45 Unit dB MHz V V A s s ms Error amplifier
Overvoltage, overcurrent and undervoltage protection
4 Ptot (W) 3
03ak51
100% (%) 95%
(1) (2)
03al76
90%
2
85%
(3) (4) (5)
1
80%
0
75%
0
4
8
12
16 IO(AV) (A)
2
5
7
10
12 15 IO(AV) (A)
See circuit of Figure 9. VDDC = 5 V; VDDO = 5 V; VO = 2.5 V
See circuit of Figure 9. (1) VO = 3.3 V (2) VO = 2.5 V (3) VO = 1.8 V (4) VO = 1.5 V (5) VO = 1.2 V
Fig 7. Total power dissipation as a function of average output current; typical values.
Fig 8. Total solution efficiency as a function of average output current; typical values.
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Product data
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PIP250M
Integrated buck converter
11. Application information
conversion supply (5 V) 1.2 H
10
BAW62 100 nF VDDC OCSET/ ENABLE VSSC CB VDDO VO PHASE VSSO FB
2.7 k
1 F
PIP250M
2000 F
2.5 H
VO 4.7
output voltage (2.5 V) 6.8 nF
1.2 k shut down
2000 F
BSH112 2.2
03ak52
Fig 9. Typical application circuit.
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Product data
Rev. 02 -- 21 February 2003
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Philips Semiconductors
PIP250M
Integrated buck converter
12. Marking
terminal 1 index area
TYPE No.
DIFFUSION LOT No. MANUFACTURING CODE COUNTRY OF ORIGIN
Design centre k = Hazel Grove, UK Diffusion centre = Hazel Grove, UK
Release status code X = Development Sample Y = Customer Qualification Sampl blank = Released for Supply
hfkYYWWY
Assembly centre f = Anam Korea
03ag38
Date code YY = last two digits of year WW = week number
03ai72
TYPE No: PIP250M-NN (NN is version number) DIFFUSION LOT No: 7 characters MANUFACTURING CODE: see Figure 11 COUNTRY OF ORIGIN: Korea
Fig 10. SOT687-1 marking.
Fig 11. Interpretation of manufacturing code.
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Product data
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PIP250M
Integrated buck converter
13. Package outline
HVQFN68: plastic thermal enhanced very thin quad flat package; no leads; 68 terminals; body 10 x 10 x 0.85 mm
D D1 terminal 1 index area B A
SOT687-1
E1 E
A
A4 A1 c
detail X
e1 e 18 L 17 b 34 35 vM C A B wM C y1 C
C y
Eh1 e Eh e2
Eh1
1 terminal 1 index area 68 Dh Dh 52
51
0
2.5 scale
5 mm
X
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1 A1 0.05 0.00 A4 0.80 0.65 b 0.30 0.18 c 0.2 D D1 Dh 3.8 3.5 E 10.15 9.85 E1 9.95 9.55 Eh 7.85 7.55 Eh1 3.8 3.5 e 0.5 e1 8 e2 8 L 0.75 0.50 v 0.1 w 0.05 y 0.05 y1 0.1
10.15 9.95 9.85 9.55
OUTLINE VERSION SOT687-1
REFERENCES IEC --JEDEC MO-220 JEITA ---
EUROPEAN PROJECTION
ISSUE DATE 02-04-24 02-10-18
Fig 12. SOT687-1.
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Product data
Rev. 02 -- 21 February 2003
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Philips Semiconductors
PIP250M
Integrated buck converter
14. Soldering
14.1 Introduction to soldering HVQFN packages
The HVQFN package is a near Chip Scale Package (CSP) with a copper lead frame. It is a leadless package, where electrical contact to the printed circuit board is made through metal pads on the underside of the package. In addition to the small pads around the periphery of the package, there are large pads on the underside that provide low thermal resistance, low electrical resistance, low inductance connections between the power components inside the package and the PCB. It is this feature of the HVQFN package that makes it ideally suited for low voltage, high current DC to DC converter applications. Electrical connection between the package and the printed circuit board is made by printing solder paste on the printed circuit board, placing the component and reflowing the solder in a convection or infra-red oven. The solder reflow process is shown in Figure 13 and the typical temperature profile is shown in Figure 14. To ensure good solder joints, the peak temperature Tp should not exceed 220 C, and the time above liquidus temperature should be less than 1.25 minutes. The ramp rate during preheat should not exceed 3 K/s. Nitrogen purge is recommended during reflow.
SOLDER PASTE PRINTING POST PRINT INSPECTION COMPONENT PLACEMENT PRE REFLOW INSPECTION
300 Temp (C)
Tp 200 Tr Te 1 min max
03aj26
1.25 min max
REFLOW SOLDERING
100
rate of rise of temperature < 3 K/s
POST REFLOW INSPECTION (PREFERABLY X-RAY) REWORK AND TOUCH UP
03aj25
0 0 1 2 time (minutes) 3
Fig 13. Typical reflow soldering process flow.
Fig 14. Typical reflow soldering temperature profile.
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Product data
Rev. 02 -- 21 February 2003
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PIP250M
Integrated buck converter
14.2 Rework guidelines
Since the solder joints are largely inaccessible, only the side fillets can be touched up. If there are defects underneath the package, then the whole package has to be removed. The first step in component removal is to reflow the solder joints. It is recommended that the board is heated from the underside using a convective heater whilst hot air or gas is directed at the upper surface of the component. Nozzles should be used to direct the hot air or gas to minimize heating of adjacent components. Excessive airflow should be avoided since this may cause the package to skew. An airflow of 15 to 20 liters per minute is usually adequate. Once the solder joints have reflowed, the component should be lifted off the board using a vacuum pen. The next step is to clean the solder pads using solder braid and a blade shaped soldering tool. Finally, the pads should be cleaned with a solvent. The solvent is usually specific to the type of solder paste used in the original assembly and the paste manufacturers recommendations should be followed.
15. Mounting
15.1 PCB design guidelines
The terminals on the underside of the package are rectangular in shape with a rounded edge on the inside. Electrical connection between the package and the printed-circuit board is made by printing solder paste onto the PCB footprint followed by component placement and reflow soldering. The PCB footprint shown in Figure 15 is designed to form reliable solder joints. The use of solder resist between each solder land is recommended. PCB tracks should not be routed through the corner areas shown in Figure 15. This is because there is a small, exposed remnant of the lead frame in each corner of the package, left over from the cropping process. Good surface flatness of the PCB lands is desirable to ensure accuracy of placement after soldering. Printed-circuit boards that are finished with a roller tin process tend to leave small lumps of tin in the corners of each land. Levelling with a hot air knife improves flatness. Alternatively, an electro-less silver or silver immersion process produces completely flat PCB lands.
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Product data
Rev. 02 -- 21 February 2003
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Philips Semiconductors
PIP250M
Integrated buck converter
1 SP (8x)
0.4 SP
0.6 Cu
0.4 SP
0.28 Cu (68x)
1 SP (8x)
11.15 OA 7.6 Cu 4.1 (2x) (2x)
0.6 Cu 0.5 SP (4x)
8.9 Cu 10.8 Cu (2x) (2x)
0.4 SP (2x)
0.9 SP (10x) e = 0.5
4.1 1 SP (10x) 8.63 OA (4x)
MGW820
solder lands
0.1 Cu pattern
0.2 clearance
0.025 solder paste
occupied area
Fig 15. PCB footprint for SOT687-1 package (reflow soldering).
15.2 Solder paste printing
The process of printing the solder paste requires care because of the fine pitch and small size of the solder lands. A stencil thickness of 0.125 mm is recommended. The stencil apertures can be made the same size as the PCB lands in Figure 15. The type of solder paste recommended for HVQFN packages is "No clean", Type 3, due to the difficulty of cleaning flux residues from beneath the package.
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Product data
Rev. 02 -- 21 February 2003
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PIP250M
Integrated buck converter
16. Revision history
Table 6: Rev Date 02 20030221 Revision history CPCN Description Product data (9397 750 10904) Modifications:
* *
Table 2: Pin description OCSET changed to OCSET/ENABLE Section 7: - Dual supply operation deleted - Regulated output voltage section added - Overcurrent protection description clarified - Figure 5 revised
*
Table 5: - Typical value of IDDC changed from 20 mA to 24 mA - Efficiency added
*
01 20021018 -
Figure 8 added.
Objective data (9397 750 10579)
9397 750 10904
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Product data
Rev. 02 -- 21 February 2003
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PIP250M
Integrated buck converter
17. Data sheet status
Level I II Data sheet status[1] Objective data Preliminary data Product status[2][3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
18. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
19. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
9397 750 10904
Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
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Philips Semiconductors
PIP250M
Integrated buck converter
Contents
1 2 3 4 5 6 6.1 6.2 7 7.1 7.1.1 7.1.2 7.1.3 7.1.4 7.1.5 7.1.6 7.1.7 7.2 7.2.1 7.2.2 7.2.3 7.2.4 7.2.5 7.2.6 8 9 10 11 12 13 14 14.1 14.2 15 15.1 15.2 16 17 18 19 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Output stage supply (VDDO, VSSO) . . . . . . . . . . 4 Output voltage (VO) . . . . . . . . . . . . . . . . . . . . . 4 Control circuit supply (VDDC, VSSC) . . . . . . . . . . 4 Bootstrap capacitor connection (CB) . . . . . . . . 4 Voltage feedback pin (FB). . . . . . . . . . . . . . . . . 4 Current limit set and enable input (OCSET/ENABLE) . . . . . . . . . . . . . . . . . 4 Sense connection for current limit (PHASE) . . . 4 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Single supply operation . . . . . . . . . . . . . . . . . . 5 Regulated output voltage . . . . . . . . . . . . . . . . . 5 Power on reset . . . . . . . . . . . . . . . . . . . . . . . . . 5 Soft start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Overcurrent protection . . . . . . . . . . . . . . . . . . . 6 Undervoltage and overvoltage protection . . . . . 7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal characteristics. . . . . . . . . . . . . . . . . . . 9 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Application information. . . . . . . . . . . . . . . . . . 11 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Introduction to soldering HVQFN packages . . 14 Rework guidelines . . . . . . . . . . . . . . . . . . . . . 15 Mounting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 PCB design guidelines . . . . . . . . . . . . . . . . . . 15 Solder paste printing. . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
(c) Koninklijke Philips Electronics N.V. 2003. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 21 February 2003 Document order number: 9397 750 10904


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